Increased Reliability of Quad Flat No Lead Wettable Flank Connections



Increased Reliability of Quad Flat No Lead Wettable Flank Connections
The focus of this study is to investigate the reliability of the immersion tin layers plated by a tailored immersion tin process for QFN flank plating.
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Authored By:


Britta Schafsteller, Hubertus Mertens, Gustavo Ramos
Atotech Deutschland GmbH & Co KG
Berlin, Germany

Summary


The quad flat no lead (QFN) package connects the integrated circuit (IC) to the printed circuit board (PCB). The exposed copper on the side edges can be a weak point in the long-term reliability of the connection and also lead to the detection of phantom failures in the automated optical inspection (AOI). In order to achieve a 3-dimensional solder connection to the PCB, the preferred approach would be that the solder joint is not only formed between the QFN bottom side and the PCB but also includes the wetting of the QFN flanks. Immersion tin plating offers the possibility to create fully wettable flanks by covering exposed copper at the QFN side walls with a plated tin layer. Nevertheless, there are concerns that immersion plated tin layers might be not enough to pass the shelf-life requirements and heat treatment due to the formation of the Cu/Sn IMC.

As the lead frame material differs from the copper substrates as used in standard PCB applications, the immersion tin plating process requires dedicated adjustment. The focus of this study is to investigate the reliability of the immersion tin layers plated by a tailored immersion tin process for QFN flank plating. The tin-plated surface of the QFN flanks is investigated in regard to its soldering performance. This is realized by applying soldering and aging criteria as defined by the target industries.

The plating process is tailored to the QFN application and includes specific pretreatment steps to prepare the copper alloy for the immersion tin plating. The properties of the plated immersion tin layers are investigated as well as potential impact of the immersion tin plating process on the electrolytic tin layers covering the QFN top. As tin layers in general are suspected to bear the risk of whisker formation as long as they are not soldered directly, this has been considered in the investigation as well. To tackle this risk, the impact of a whisker mitigating additive is also studied and presented.

The soldering performance after different aging conditions is evaluated and correlated to the formation of the intermetallic compound (IMC) after aging. As conclusion it can be stated that the immersion tin coverage of the QFN side flanks allows a enhanced solder wetting and solder joint formation whilst an additionally significant benefit is to enable the possibility of automatic optical inspection.

Conclusions


In this study an immersion tin plating process is discussed, which can improve the formation of three-dimensional solder joints of QFN to enhance the solder joint strength and ease the AOI inspection of the assembled QFNs. The process consists of a dedicated pre-clean system to clean the QFN side flanks after the separation process and ensure a homogeneous tin plating. The tin deposit on the side flanks provides good solderability even after thermal or steam aging which correlates with sufficient free tin remaining after the IMC formation.

The single process steps were checked on their impact on the electrolytic tin deposit of the QFN bottom pad and no negative impact could be detected. To prevent the formation of whiskers which are a known risk for immersion tin deposits, an anti-whisker additive is introduced which deposits at the grain boundaries of the tin deposit and by that inhibits the formation of tin whiskers.

Initially Published in the SMTA Proceedings

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