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STATS ChipPAC is a leading provider of advanced semiconductor packaging and test services to global customers in the communication, consumer and computing markets. With a broad technology portfolio ranging from leadframe and laminate packages to advanced fan-out and fan-in wafer level technology, flip chip interconnect, System-in-Package (SiP), Through Silicon Via (TSV) and 2.5D/3D packaging, STATS ChipPAC provides customers with innovative and cost-effective semiconductor solutions.

STATS ChipPAC differentiates itself through innovative packaging solutions in embedded Wafer Level Ball Grid Array (eWLB), encapsulated Wafer Level Chip Scale Packaging (eWLCSP) and fcCuBE technology as well as our breakthrough wafer level manufacturing method known as FlexLineTM.

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JCET / Stats ChipPac

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46429 Landing Parkway Fremont, CA 94538
Lisa Lavin

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