Authored By:
Tim Swettlen, David Boggs, Juan Landeros, Dudi Amir and Scott Mokler Intel Corporation
Hillsboro, OR, USA
Summary
To keep up with shrinking system volume requirements for the Internet of Things and wearable devices while maintaining maximum device functionality requires an integrated approach to SoC and SiP optimization. To accomplish this we investigated the Direct Chip Attach (DCA) of a high density WLCSP onto the Printed Circuit Board (PCB) to obtain the smallest system footprint possible without compromising performance.
Typically, to keep costs low, SoCs do not support the most aggressive interconnect density, and instead use wire-bond or large pitch flip chip packages to mount to the board. In this study, we take the opposite approach. Using DCA to attach the SoC directly to the PCB, we maximize the interconnect density between the board and silicon while keeping the cost low by eliminating the SoC package.
This paper describes the impact of attaching a high performance SoC directly onto the board in terms of the PCB design, PCB fabrication and cost. We also investigate the SMT challenges of mounting the silicon directly onto the PCB at a 260 um pitch array. Key metrics in this study include SMT yield, PCB routing, and PCB fabrication constraints as they relate to signal quality.
In addition, the paper discusses future development challenges that face both the designers and PCB manufactures as they progress to support larger and denser direct chip attach products.
Conclusions
Direct Chip Attach of high density and high signal count SoC devices provides a clear advantage in both size and functionality for wearable and Internet of Things products. We have provided our view of the PCB design rules required to scale into the 150 um pitch range. We provided examples of manufactured PCBs that were at the limits of subtractive processing and scaled to support a 210 um pitch DCA product.
We discussed the value of mSAP and fully additive PCB manufacturing and how these process changes could be beneficial for smaller and arguably low cost PCBs. We provided some SMT data we have collected to date to defend the design choices and discuss trade-offs between SMT assembly and PCB manufacturing (ex. soldermask). While there are several technology barriers and initial costs, we foresee the value to grow the DCA capability to include products as complex as SoCs.
Initially Published in the IPC Proceedings
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