Authored By:
David M Lee, Eldwin L Dodson, Guy V Clatterbaugh
Johns Hopkins University
Applied Physics Laboratory
Transcript
Flip chip bonding is the most desirable direct chip attachment approach for minimizing electronic assembly size and improving device performance.
For most prototyping applications it is not cost effective to purchase individual integrated circuits that are soldered bumped. Many unpackaged ICs in dye form are not available for purchase as an entire waiver for subsequent solder bumping. As an alternative, manufacturers of wire bond equipment have developed the gold stud bump process, which allows single ICs to be automatically bumped using one mil gold wire. However, the rapid formation of brittle aluminum gold innerrmetalics at elevated temperatures precludes the use of thermal compression flip chip bonding due to the unreliability of the bond at the IC pad interface.
To overcome this, an electrolyst nickel and gold plating process was developed.
This paper presents data comparing immersion and autocatalytic gold plating processes.
Summary
Flip chip bonding is the most desirable direct chip attachment approach for minimizing electronic assembly size as well as improving device performance. For most prototyping applications it is not cost-effective to purchase individual integrated circuits (ICs) that are solder-bumped as this typically requirs the purchase of entire wafer. Also, many unpackaged IC's in die form are not available for purchase as an entire wafer for subsequent solder bumping. As an alternative to solder bumping, manufacturers of wire bond equipment have developed the gold stud bump process which allows single IC's to be automatically bumped using 1-mil gold wire.
However, the rapid formation of brittle aluminum-gold (Al-Au) intermetallics at elevated temperatures (>200°C) precludes the use of thermocompression flip chip bonding due to the unreliability of the bond at the IC pad interface. To overcome the intermetallic problem at the ICs aluminum-metallized bonding pads, an electroless nickel and gold plating process was developed for making a gold-bondable diffusion barrier for use on individual, unpackaged silicon IC's. This process provided an electroless gold layer suitable for accepting the gold wire stud bumps as well as providing the necessary barrier to Al- Au intermetallic formation.
A number of experiments were conducted using electroless nickel of various phosphorus contents to determine which would provide an optimal diffusion layer. Data will be presented comparing immersion and autocatalytic gold plating processes. Test wafers were stud-bumped and exposed to accelerated temperatures then shear tested. Electroless nickel,immersion and autocatalytic gold plating process parameters were optimized to provide high reliability interconnections when using the high temperature thermocompression flip-chip bonding die-attach method.
Conclusions
Multiple tests were conducted to compare the effect of phosphorus content, pre-plating preparation and gold thickness on gold stud bump reliability at thermocompression bonding temperatures. The results indicated that a reliable ENIG deposit was obtained using a 7-8% phosphorus nickel with a thick gold layer. Pre-plating die preparation was highly dependent upon device technology
Initially Published in the IPC Proceedings
|
